[coreboot-gerrit] Patch set updated for coreboot: intel/gma: Fix obvious typo GMBUS0 -> GMBUS1 in edid.c

[Swift Geek]

Swift Geek ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16341

-gerrit

commit ddf27dd5c45780ea29e2b24d2401e91f533ad610
Author: Swift Geek (Sebastian Grzywna) 
Date:   Sun Aug 28 04:28:53 2016 +0200

intel/gma: Fix obvious typo GMBUS0 -> GMBUS1 in edid.c

This typo existed in code before rewriting for using
    defines and it's clearly visible after rewrite.
    Previously it was writing to reserved area of GMBUS0 register,
    while values are matching those of GMBUS1.

Change-Id: Ic85ef925c41ad01ed469f9d4f4412cbe44ca6d8e
    Signed-off-by: Swift Geek (Sebastian Grzywna) 
---
 src/drivers/intel/gma/edid.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/drivers/intel/gma/edid.c b/src/drivers/intel/gma/edid.c
index 3902094..316e869 100644
--- a/src/drivers/intel/gma/edid.c
+++ b/src/drivers/intel/gma/edid.c
@@ -56,7 +56,7 @@ static void intel_gmbus_stop_bus(u8 * mmio, u8 bus)
    write32(GMBUS1_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP | GMBUS_SLAVE_WRITE
    	| (AT24_ADDR << 1) );
    wait_rdy(mmio);
-	write32(GMBUS0_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP);
+	write32(GMBUS1_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP);
    write32(GMBUS2_ADDR, GMBUS_INUSE);
 }

@@ -101,7 +101,7 @@ void intel_gmbus_read_edid(u8 *mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size)
    	| GMBUS_SLAVE_WRITE | GMBUS_CYCLE_WAIT | GMBUS_CYCLE_STOP
    	| (128 << GMBUS_BYTE_COUNT_SHIFT) | (slave << 1) );
    wait_rdy(mmio);
-	write32(GMBUS0_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP );
+	write32(GMBUS1_ADDR, GMBUS_SW_RDY | GMBUS_CYCLE_STOP );
    write32(GMBUS2_ADDR, GMBUS_INUSE);

printk (BIOS_SPEW, "EDID:\n");