[coreboot-gerrit] Change in coreboot[master]: device: Add a disbling PCIe device bus master function

[John Zhao (Code Review)]

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41042 )

Change subject: device: Add a disbling PCIe device bus master function
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device: Add a disbling PCIe device bus master function

A function pci_dev_disable_bus_master() is created. This function
can be used to disable Thunderbolt PCIe root ports, bridges and
devices for Vt-d based security platform at end of boot service.

BUG=None
TEST=verified PCIe device bus master enable bit is cleared.

Signed-off-by: John Zhao 
Change-Id: Ie92a15bf2c66fdc311098acb81019d4fb7f68313
---
M src/device/pci_device.c
M src/include/device/pci.h
2 files changed, 17 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/41042/1

diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 6fce761..7c1b9d8 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -1568,4 +1568,20 @@
 #endif
    }
 }
+
+/**
+ * Disable device bus master.
+ *
+ * This function is to disable device bus master.
+ *
+ * @param dev Pointer to the device.
+ */
+void pci_dev_disable_bus_master(struct device *dev)
+{
+	u16 reg;
+
+	reg = pci_read_config16(dev, PCI_COMMAND);
+	reg &= ~PCI_COMMAND_MASTER;
+	pci_write_config16(dev, PCI_COMMAND, reg);
+}
 #endif
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index f091105..2283359 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -127,6 +127,7 @@
    return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY;
 }

+void pci_dev_disable_bus_master(struct device *dev);
 #endif /* CONFIG_PCI */

void pci_early_bridge_init(void);