Hello Kyösti Mälkki, Patrick Rudolph, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/30993
to look at the new patch set (#14).
Change subject: nb/intel/i945: Fix ich7_setup_root_complex_topology ......................................................................
nb/intel/i945: Fix ich7_setup_root_complex_topology
Element Self Description register (ESD) [23:16] is R/WO, so let write the ESD.CID when we start ich7_setup_root_complex_topology. This value is also used to program the R/WO 'Target Component ID' registers of RPxD and HHD. Once it is done, no need to rewrite on them as they become RO. (For more information, please see ICH7 datasheet page 271.)
Tested on 945G-M4: before this change, writing on those registers had no effect. The check is done using printk before and after writing. With this change, those R/WO get the "right" values. i.e., We can see RCBA32(ULBA) is now equal to (uintptr_t)DEFAULT_DMIBAR. Here is the values: (without this patch --> with this patch): ESD: 0x0104: 0x00000802 --> 0x0104: 0x00020802 ULD: 0x0110: 0x00000001 --> 0x0110: 0x01010001 ULBA: 0x0118: 0x00000000 --> 0x0118: 0xfed18000 RP1D: 0x0120: 0x01000003 --> 0x0120: 0x01020003 RP2D: 0x0130: 0x02000003 --> 0x0130: 0x02020003 RP3D: 0x0140: 0x03000002 --> 0x0140: 0x03020002 RP4D: 0x0150: 0x04000002 --> 0x0150: 0x04020002 HDD: 0x0160: 0x0f000002 --> 0x0160: 0x0f020002 RP5D: 0x0170: 0x05000002 --> 0x0170: 0x05020002 RP6D: 0x0180: 0x06000002 --> 0x0180: 0x06020002
Change-Id: I3f2199d6da22ce9995496c2a81363710edde81f3 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/i945/early_init.c 1 file changed, 15 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/30993/14