[coreboot-gerrit] Change in coreboot[master]: device/cardbus: Fix use of PCI_CB_BRIDGE_CONTROL

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35518 )

Change subject: device/cardbus: Fix use of PCI_CB_BRIDGE_CONTROL
......................................................................

device/cardbus: Fix use of PCI_CB_BRIDGE_CONTROL

Read-modify-write needs to access the same register. Numerically
both used defines are 0x3e, while register implementations are
not identical but only similar.

Change-Id: I9348b855320f86868e2d3ef76d3b8d7a4ab7fae0
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35518
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
Reviewed-by: Michael Niewöhner
---
M src/device/cardbus_device.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved
  Michael Niewöhner: Looks good to me, but someone else must approve

diff --git a/src/device/cardbus_device.c b/src/device/cardbus_device.c
index 4b24c54..826d785 100644
--- a/src/device/cardbus_device.c
+++ b/src/device/cardbus_device.c
@@ -161,7 +161,7 @@
    /* Error check */
    ctrl |= (PCI_CB_BRIDGE_CTL_PARITY | PCI_CB_BRIDGE_CTL_SERR);
    printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
-	pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
+	pci_write_config16(dev, PCI_CB_BRIDGE_CONTROL, ctrl);

pci_dev_enable_resources(dev);
 }