build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48933 )
Change subject: src/*/*/*/bootblock.c: Cosmetic clean-up and fix includes ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/c/coreboot/+/48933/1/src/northbridge/intel/gm45/... File src/northbridge/intel/gm45/bootblock.c:
https://review.coreboot.org/c/coreboot/+/48933/1/src/northbridge/intel/gm45/... PS1, Line 17: * no assembly code is using the CONFIG(MMCONF_SUPPORT) option to do PCI config accesses. line over 96 characters
https://review.coreboot.org/c/coreboot/+/48933/1/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/bootblock.c:
https://review.coreboot.org/c/coreboot/+/48933/1/src/northbridge/intel/sandy... PS1, Line 16: * bootblock_northbridge_init() is the first thing called in the non-asm boot block code. line over 96 characters
https://review.coreboot.org/c/coreboot/+/48933/1/src/soc/intel/broadwell/boo... File src/soc/intel/broadwell/bootblock.c:
https://review.coreboot.org/c/coreboot/+/48933/1/src/soc/intel/broadwell/boo... PS1, Line 18: * no assembly code is using the CONFIG(MMCONF_SUPPORT) option to do PCI config accesses. line over 96 characters