You-Cheng Syu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33166
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
mediatek/mt8183: Use GPIO based CS for SPI0
Some boards (e.g., Kukui) needs GPIO based CS for SPI0. This CL changes the pinmux and binds the pin to SPI0.
BUG=b:132311067 TEST=Verified that b/132311067 is irreproducible now.
Change-Id: Id4248b3f146a1f1b44124f7a2671dbbc824eda01 --- M src/soc/mediatek/mt8183/spi.c 1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/33166/1
diff --git a/src/soc/mediatek/mt8183/spi.c b/src/soc/mediatek/mt8183/spi.c index a79dafb..cb35c63 100644 --- a/src/soc/mediatek/mt8183/spi.c +++ b/src/soc/mediatek/mt8183/spi.c @@ -21,9 +21,12 @@ #include <soc/gpio.h> #include <soc/spi.h>
+static gpio_t spi0_cs = GPIO(SPI_CSB); + struct mtk_spi_bus spi_bus[SPI_BUS_NUMBER] = { { .regs = (void *)SPI0_BASE, + .cs_gpio = &spi0_cs, }, { .regs = (void *)SPI1_BASE, @@ -52,7 +55,7 @@ static const struct pad_func pad0_funcs[SPI_BUS_NUMBER][4] = { { PAD_FUNC(SPI_MI, SPI0_MI), - PAD_FUNC(SPI_CSB, SPI0_CSB), + {PAD_SPI_CSB_ID, 0}, PAD_FUNC(SPI_MO, SPI0_MO), PAD_FUNC(SPI_CLK, SPI0_CLK), },