[coreboot-gerrit] Change in coreboot[master]: drivers/intel/fsp: Map FSP debug level to coreboot console level

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60471 )

Change subject: drivers/intel/fsp: Map FSP debug level to coreboot console level
......................................................................

drivers/intel/fsp: Map FSP debug level to coreboot console level

This patch maps coreboot console level to FSP debug level. This
is useful to suppress MRC (FSP-M) debug logs.

Callers have to select HAVE_DEBUG_RAM_SETUP config to get verbose MRC
debug log,

Signed-off-by: Subrata Banik 
Change-Id: I398d576fad68a0d0fc931c175bbc04fcbc2e54ec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60471
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Nico Huber 
Reviewed-by: Tim Wawrzynczak 
---
M src/drivers/intel/fsp2_0/debug.c
M src/drivers/intel/fsp2_0/include/fsp/debug.h
2 files changed, 47 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved
  Angel Pons: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, but someone else must approve

diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c
index 323c799..130ea6d 100644
--- a/src/drivers/intel/fsp2_0/debug.c
+++ b/src/drivers/intel/fsp2_0/debug.c
@@ -1,8 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

+#include <commonlib/helpers.h>
 #include <console/console.h>
 #include <console/streams.h>
 #include <cpu/x86/mtrr.h>
+#include <fsp/debug.h>
 #include <fsp/util.h>

asmlinkage size_t fsp_write_line(uint8_t *buffer, size_t number_of_bytes)
@@ -32,6 +34,41 @@
    }
 }

+enum fsp_log_level fsp_map_console_log_level(void)
+{
+	enum fsp_log_level fsp_debug_level;
+
+	switch (get_log_level()) {
+	case BIOS_EMERG:
+	case BIOS_ALERT:
+	case BIOS_CRIT:
+	case BIOS_ERR:
+		fsp_debug_level = FSP_LOG_LEVEL_ERR;
+		break;
+	case BIOS_WARNING:
+		fsp_debug_level = FSP_LOG_LEVEL_ERR_WARN;
+		break;
+	case BIOS_NOTICE:
+		fsp_debug_level = FSP_LOG_LEVEL_ERR_WARN_INFO;
+		break;
+	case BIOS_INFO:
+		fsp_debug_level = FSP_LOG_LEVEL_ERR_WARN_INFO_EVENT;
+		break;
+	case BIOS_DEBUG:
+	case BIOS_SPEW:
+		fsp_debug_level = FSP_LOG_LEVEL_VERBOSE;
+		break;
+	default:
+		fsp_debug_level = FSP_LOG_LEVEL_DISABLE;
+		break;
+	}
+
+	if (!CONFIG(DEBUG_RAM_SETUP))
+		fsp_debug_level = MIN(fsp_debug_level, FSP_LOG_LEVEL_ERR_WARN);
+
+	return fsp_debug_level;
+}
+
 /*-----------
  * MemoryInit
  *-----------
diff --git a/src/drivers/intel/fsp2_0/include/fsp/debug.h b/src/drivers/intel/fsp2_0/include/fsp/debug.h
index be7dd3a..b6f982a 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/debug.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/debug.h
@@ -5,7 +5,17 @@

#include <fsp/util.h>

+enum fsp_log_level {
+	FSP_LOG_LEVEL_DISABLE = 0,
+	FSP_LOG_LEVEL_ERR,
+	FSP_LOG_LEVEL_ERR_WARN,
+	FSP_LOG_LEVEL_ERR_WARN_INFO,
+	FSP_LOG_LEVEL_ERR_WARN_INFO_EVENT,
+	FSP_LOG_LEVEL_VERBOSE
+};
+
 /* FSP debug API */
+enum fsp_log_level fsp_map_console_log_level(void);
 void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
    const FSPM_UPD *fspm_old_upd,
    const FSPM_UPD *fspm_new_upd);