Jose S. Cofreros Jr. has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56150 )
Change subject: Documentation/Intel/ Documentation/mainboard/kontron/ Documentation/mainboard/purism/: Change word/phrase Coreboot to Coreboot ......................................................................
Documentation/Intel/ Documentation/mainboard/kontron/ Documentation/mainboard/purism/: Change word/phrase Coreboot to Coreboot
lint-stable-021-coreboot-lowercase requires Coreboot to be coreboot but instead replaced to Coreboot. C is the HTML code for C.
Signed-off-by: Jose S. Cofreros Jr jose.sx.cofreros.jr@intel.com Change-Id: Iab265fa7fee5018a2ad8cafa0133f37a2a4e3737 --- M Documentation/Intel/SoC/quark.html M Documentation/Intel/SoC/soc.html M Documentation/Intel/development.html M Documentation/Intel/index.html M Documentation/mainboard/kontron/mal10.md M Documentation/mainboard/purism/librem_14.md M Documentation/mainboard/purism/librem_mini.md 7 files changed, 28 insertions(+), 28 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/56150/1
diff --git a/Documentation/Intel/SoC/quark.html b/Documentation/Intel/SoC/quark.html index c3eead2..d3f7806 100644 --- a/Documentation/Intel/SoC/quark.html +++ b/Documentation/Intel/SoC/quark.html @@ -19,7 +19,7 @@ <li><a target="_blank" href="../fsp1_1.html">FSP 1.1</a> integration</li> <li><a target="_blank" href="../Board/board.html">Board</a> support</li> <li><a target="_blank" href="#QuarkFsp">Quark™ FSP</a></li> - <li><a target="_blank" href="#CorebootPayloadPkg">CorebootPayloadPkg</a></li> + <li><a target="_blank" href="#CorebootPayloadPkg">CorebootPayloadPkg</a></li> </ul> </td> </tr> @@ -49,23 +49,23 @@
<hr> -<h2><a name="CorebootPayloadPkg">Quark™ EDK2 CorebootPayloadPkg</a></h2> +<h2><a name="CorebootPayloadPkg">Quark™ EDK2 CorebootPayloadPkg</a></h2> <p> Build Instructions: </p> <ol> <li>Set up <a href="#BuildEnvironment">build environment</a></li> <li>Linux (assumes GCC48): -<pre><code>build -p CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc -a IA32 \ +<pre><code>build -p CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc -a IA32 \ -t GCC48 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 \ -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL \ -DMAX_LOGICAL_PROCESSORS=1 -ls Build/CorebootPayloadPkgIA32/DEBUG_GCC48/FV/UEFIPAYLOAD.fd +ls Build/CorebootPayloadPkgIA32/DEBUG_GCC48/FV/UEFIPAYLOAD.fd </code></pre> </li> <li>Windows (assumes Visual Studio 2015): -<pre><code>build -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -a IA32 -t VS2015x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL -DMAX_LOGICAL_PROCESSORS=1 -dir Build\CorebootPayloadPkgIA32\DEBUG_VS2015x86\FV\UEFIPAYLOAD.fd +<pre><code>build -p CorebootPayloadPkgCorebootPayloadPkgIa32.dsc -a IA32 -t VS2015x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL -DMAX_LOGICAL_PROCESSORS=1 +dir BuildCorebootPayloadPkgIA32\DEBUG_VS2015x86\FV\UEFIPAYLOAD.fd </code></pre> </li> <li>In the .config for coreboot, set the following Kconfig values: diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html index 8d565d5..adf1fd3 100644 --- a/Documentation/Intel/SoC/soc.html +++ b/Documentation/Intel/SoC/soc.html @@ -569,18 +569,18 @@ <hr> <h2><a name="AcpiTables">ACPI Tables</a></h2> <p> - One of the payloads that needs ACPI tables is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. + One of the payloads that needs ACPI tables is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. </p>
<h3>FADT</h3> <p> The EDK2 module - CorebootModulePkg/Library/CbParseLib/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbParseLib/CbParseLib.c#l450">CbParseLib.c</a> + CorebootModulePkg/Library/CbParseLib/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbParseLib/CbParseLib.c#l450">CbParseLib.c</a> requires that the FADT contains the values in the table below. These values are placed into a HOB identified by - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CorebootModulePkg.dec#l36">gUefiAcpiBoardInfoGuid</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CorebootModulePkg.dec#l36">gUefiAcpiBoardInfoGuid</a> by routine - CorebootModulePkg/CbSupportPei/CbSupportPei/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CbSupportPei/CbSupportPei.c#l364">CbPeiEntryPoint</a>. + CorebootModulePkg/CbSupportPei/CbSupportPei/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CbSupportPei/CbSupportPei.c#l364">CbPeiEntryPoint</a>. </p> <table border="1"> <tr bgcolor="#c0ffc0"> @@ -597,9 +597,9 @@ <td>gpe0_blk<br>gpe0_blk_len</td> <td>Gpe0Blk<br>Gpe0BlkLen</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbParseLib/CbParseLib.c#l477">PmGpeEnBase</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbParseLib/CbParseLib.c#l477">PmGpeEnBase</a> </td> - <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l129">Shutdown</a></td> + <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l129">Shutdown</a></td> <td>4.8.4.1</td> </tr> <tr> @@ -607,8 +607,8 @@ <td>Pm1aCntBlk</td> <td>PmCtrlRegBase</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l139">Shutdown</a><br> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l40">Suspend</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l139">Shutdown</a><br> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l40">Suspend</a> </td> <td>4.8.3.2.1</td> </tr> @@ -616,7 +616,7 @@ <td>pm1a_evt_blk</td> <td>Pm1aEvtBlk</td> <td>PmEvtBase</td> - <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l134">Shutdown</a></td> + <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l134">Shutdown</a></td> <td>4.8.3.1.1</td> </tr> <tr> @@ -624,7 +624,7 @@ <td>PmTmrBlk</td> <td>PmTimerRegBase</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#l55">Timer</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#l55">Timer</a> </td> <td>4.8.3.3</td> </tr> @@ -633,9 +633,9 @@ <td>ResetReg.Address</td> <td>ResetRegAddress</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> and - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> resets </td> <td>4.3.3.6</td> @@ -645,9 +645,9 @@ <td>ResetValue</td> <td>ResetValue</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> and - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> resets </td> <td>4.8.3.6</td> @@ -677,7 +677,7 @@ <hr> <h2><a name="LegacyHardware">Legacy Hardware</a></h2> <p> - One of the payloads that needs legacy hardare is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. + One of the payloads that needs legacy hardare is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. </p>
<table border="1"> diff --git a/Documentation/Intel/development.html b/Documentation/Intel/development.html index 92b1d4b..c38d0e6 100644 --- a/Documentation/Intel/development.html +++ b/Documentation/Intel/development.html @@ -150,12 +150,12 @@ <tr> <td>8254 Programmable Interval Timer</td> <td><a target="_blank" href="SoC/soc.html#LegacyHardware">Legacy hardware</a> support</td> - <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> + <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> </tr> <tr> <td>8259 Programmable Interrupt Controller</td> <td><a target="_blank" href="SoC/soc.html#LegacyHardware">Legacy hardware</a> support</td> - <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> + <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> </tr> <tr> <td>Cache-as-RAM</td> diff --git a/Documentation/Intel/index.html b/Documentation/Intel/index.html index 9d8aad0..f7d4bb8 100644 --- a/Documentation/Intel/index.html +++ b/Documentation/Intel/index.html @@ -10,7 +10,7 @@ <h2>Intel® x86 Boards</h2> <ul> <li><a target="_blank" href="Board/galileo.html">Galileo</a></li> - <li><a target="_blank" href="http://wiki.minnowboard.org/Coreboot">MinnowBoard MAX</a></li> + <li><a target="_blank" href="http://wiki.minnowboard.org/Coreboot">MinnowBoard MAX</a></li> </ul>
<h2>Intel® x86 SoCs</h2> @@ -36,7 +36,7 @@ <hr> <h2>Payload Development</h2> <ul> - <li><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> + <li><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> <ul> <li><a target="_blank" href="https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Development-Process">EDK II Development Process</a></li> <li>EDK II <a target="_blank" href="https://github.com/tianocore/tianocore.github.io/wiki/EDK%20II%20White%20papers">White Papers</a></li> diff --git a/Documentation/mainboard/kontron/mal10.md b/Documentation/mainboard/kontron/mal10.md index b2eefc3..a28ef88 100644 --- a/Documentation/mainboard/kontron/mal10.md +++ b/Documentation/mainboard/kontron/mal10.md @@ -76,7 +76,7 @@ ## Known issues
- Works only with Tianocore "UEFIPayload" payload edk2-stable201903-1569-g3e63a91 - Booting with the "CorebootPayload" [crashes]. + Booting with the "CorebootPayload" [crashes]. - Tianocore outputs video through an external GPU only.
## Untested diff --git a/Documentation/mainboard/purism/librem_14.md b/Documentation/mainboard/purism/librem_14.md index 6ece264..82e97ed 100644 --- a/Documentation/mainboard/purism/librem_14.md +++ b/Documentation/mainboard/purism/librem_14.md @@ -92,7 +92,7 @@
* Internal display with libgfxinit, VGA option ROM, or FSP/GOP init * External displays via HDMI, USB-C Alt-Mode - * SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), and Heads payloads + * SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), and Heads payloads * Ethernet, m.2 2230 Wi-Fi * System firmware updates via flashrom * M.2 storage (NVMe, SATA III) diff --git a/Documentation/mainboard/purism/librem_mini.md b/Documentation/mainboard/purism/librem_mini.md index f8ee00d..76e215b 100644 --- a/Documentation/mainboard/purism/librem_mini.md +++ b/Documentation/mainboard/purism/librem_mini.md @@ -107,7 +107,7 @@
* External displays via HDMI/DisplayPort with VGA option ROM or FSP/GOP init (no libgfxinit support yet) - * SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), Heads (Purism downstream) payloads + * SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), Heads (Purism downstream) payloads * Ethernet, m.2 2230 Wi-Fi * System firmware updates via flashrom * PCIe NVMe