[coreboot-gerrit] [S] Change in coreboot[master]: mb/google/drallion: Add method to set GPIOs in romstage

[Martin L Roth (Code Review)]

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71190 )

Change subject: mb/google/drallion: Add method to set GPIOs in romstage
......................................................................

mb/google/drallion: Add method to set GPIOs in romstage

Add method variant_romstage_gpio_table() with empty implementation to
be used in a subsequent commit for touchscreen power sequencing.
Call method in romstage to program any GPIOs that may need to be set.

TEST=tested with rest of patch train

Change-Id: I0ad0c18a8b61e59a943a453882bf74762bac4700
Signed-off-by: Matt DeVillier 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71190
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/mainboard/google/drallion/romstage.c
M src/mainboard/google/drallion/variants/drallion/gpio.c
M src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h
3 files changed, 32 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/google/drallion/romstage.c b/src/mainboard/google/drallion/romstage.c
index 15f9c8d..bea4fee 100644
--- a/src/mainboard/google/drallion/romstage.c
+++ b/src/mainboard/google/drallion/romstage.c
@@ -4,14 +4,20 @@
 #include <soc/cnl_memcfg_init.h>
 #include <soc/romstage.h>
 #include <baseboard/variants.h>
+#include <variant/gpio.h>

void mainboard_memory_init_params(FSPM_UPD *memupd)
 {
    struct cnl_mb_cfg board_memcfg;
+	const struct pad_config *pads;
+	size_t pads_num;

variant_mainboard_post_init_params(memupd);

wilco_ec_romstage_init();

cannonlake_memcfg_init(&memupd->FspmConfig, get_variant_memory_cfg(&board_memcfg));
+
+	pads = variant_romstage_gpio_table(&pads_num);
+	gpio_configure_pads(pads, pads_num);
 }
diff --git a/src/mainboard/google/drallion/variants/drallion/gpio.c b/src/mainboard/google/drallion/variants/drallion/gpio.c
index 6220bf2..b008427 100644
--- a/src/mainboard/google/drallion/variants/drallion/gpio.c
+++ b/src/mainboard/google/drallion/variants/drallion/gpio.c
@@ -249,6 +249,12 @@
    return early_gpio_table;
 }

+const struct pad_config *variant_romstage_gpio_table(size_t *num)
+{
+	*num = 0;
+	return NULL;
+}
+
 static const struct cros_gpio cros_gpios[] = {
    CROS_GPIO_REC_AL(GPP_E8, CROS_GPIO_DEVICE_NAME),
    CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME),
diff --git a/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h b/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h
index db0b3a9..ee48fec 100644
--- a/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h
+++ b/src/mainboard/google/drallion/variants/drallion/include/variant/gpio.h
@@ -28,5 +28,6 @@

const struct pad_config *variant_gpio_table(size_t *num);
 const struct pad_config *variant_early_gpio_table(size_t *num);
+const struct pad_config *variant_romstage_gpio_table(size_t *num);

#endif