Krishna P Bhat D has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32110 )
Change subject: soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetree ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/#/c/32110/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32110/3//COMMIT_MSG@7 PS3, Line 7: FPMCU_RST
This doesn't apply to all CNL boards.
Since it does not apply to all CNL boards, we can do it in board specific devicetree.cb.
https://review.coreboot.org/#/c/32110/3//COMMIT_MSG@7 PS3, Line 7: GPP_A12
Isn't this all GPIOs?
Yes. Have changed to indicate it is all GPIOs.
https://review.coreboot.org/#/c/32110/3//COMMIT_MSG@9 PS3, Line 9: GPP_A12 is being GPIO padlocked and cannot used in kernel. Unlock the : GPIO pads to export this pin in kernel to be used as FPMCU_RST.
This is specific to hatch.
Have pushed a hatch mainboard specific patch here. https://review.coreboot.org/c/coreboot/+/32126