Nico Huber (nico.huber@secunet.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3391
-gerrit
commit 2544f76f71f28b274768a5e385cd940230bb822b Author: Nico Huber nico.huber@secunet.com Date: Tue May 14 15:25:26 2013 +0200
winbond/w83627dhg: Correct resource setting for SPI (LDN6)
The SPI logical device on the W83627DHG uses the second i/o port register pair but not the first one. So we have to also set `io1` (the second io_info struct) and not `io0` in the pnp_info structure.
Setting the PNP_IO1 flag without a mask in `io1` caused coreboot to hang in pnp_enable_devices() until commit aeead274 which added a check for an unset mask.
Change-Id: I027d279b4641fecd88afb14d40fbe1c0bfbf81bb Signed-off-by: Nico Huber nico.huber@secunet.com --- src/superio/winbond/w83627dhg/superio.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index bbde26a..510a6f3 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -101,8 +101,7 @@ static struct pnp_info pnp_dev_info[] = { { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, }, - /* the next line makes coreboot hang in pnp_enable_devices() */ - /* { &ops, W83627DHG_SPI, PNP_IO1, { 0x7f8, 0 }, }, */ + { &ops, W83627DHG_SPI, PNP_IO1, {}, { 0x7f8, 0 }, }, { &ops, W83627DHG_GPIO6, }, { &ops, W83627DHG_WDTO_PLED, }, { &ops, W83627DHG_GPIO2, },