[coreboot-gerrit] Change in coreboot[master]: soc/intel/elkhartlake: Fix EHL mainboard build fail errors

[Lean Sheng Tan (Code Review)]

Lean Sheng Tan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47804 )

Change subject: soc/intel/elkhartlake: Fix EHL mainboard build fail errors
......................................................................

soc/intel/elkhartlake: Fix EHL mainboard build fail errors

When EHL initial mainboard patch is uploaded, there are some build
errors caused by EHL soc codes. Here are the fixes:
1. include gpio_op.asl to resolve undefined variables in scs.asl
2. remove unused variables in fsp_params.c
3. rearrage sequences of #includes to fix build dependency of
   soc/gpio_defs.h in intelblocks/gpio.h
4. add the __weak to mainboard_memory_init_params function

Signed-off-by: Tan, Lean Sheng 
Change-Id: Idaa8b0b5301742287665abde065ad72965bc62b3
---
M src/soc/intel/elkhartlake/acpi/gpio.asl
M src/soc/intel/elkhartlake/fsp_params.c
M src/soc/intel/elkhartlake/include/soc/gpio.h
M src/soc/intel/elkhartlake/romstage/fsp_params.c
4 files changed, 3 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/47804/1

diff --git a/src/soc/intel/elkhartlake/acpi/gpio.asl b/src/soc/intel/elkhartlake/acpi/gpio.asl
index ac0d1df..27cb503 100644
--- a/src/soc/intel/elkhartlake/acpi/gpio.asl
+++ b/src/soc/intel/elkhartlake/acpi/gpio.asl
@@ -3,6 +3,7 @@
 #include <intelblocks/gpio.h>
 #include <soc/gpio_defs.h>
 #include <soc/intel/common/acpi/gpio.asl>
+#include <soc/intel/common/block/acpi/acpi/gpio_op.asl>
 #include <soc/irq.h>
 #include <soc/pcr_ids.h>

diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c
index 3d740fb..83a3699 100644
--- a/src/soc/intel/elkhartlake/fsp_params.c
+++ b/src/soc/intel/elkhartlake/fsp_params.c
@@ -44,17 +44,13 @@

static void parse_devicetree(FSP_S_CONFIG *params)
 {
-	const struct soc_intel_elkhartlake_config *config = config_of_soc();
    /* TODO: Update with UPD override as FSP matures */
 }

/* UPD parameters to be initialized before SiliconInit */
 void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 {
-	unsigned int i;
-	struct device *dev;
    FSP_S_CONFIG *params = &supd->FspsConfig;
-	struct soc_intel_elkhartlake_config *config = config_of_soc();

/* Parse device tree and fill in FSP UPDs */
    parse_devicetree(params);
diff --git a/src/soc/intel/elkhartlake/include/soc/gpio.h b/src/soc/intel/elkhartlake/include/soc/gpio.h
index 6cca742..367df82 100644
--- a/src/soc/intel/elkhartlake/include/soc/gpio.h
+++ b/src/soc/intel/elkhartlake/include/soc/gpio.h
@@ -3,8 +3,8 @@
 #ifndef _SOC_ELKHARTLAKE_GPIO_H_
 #define _SOC_ELKHARTLAKE_GPIO_H_

-#include <intelblocks/gpio.h>
 #include <soc/gpio_defs.h>
+#include <intelblocks/gpio.h>

#define CROS_GPIO_NAME		"INT34C8"
 #define CROS_GPIO_COMM0_NAME    "INT34C8:00"
diff --git a/src/soc/intel/elkhartlake/romstage/fsp_params.c b/src/soc/intel/elkhartlake/romstage/fsp_params.c
index 3961dfc..0fa8451 100644
--- a/src/soc/intel/elkhartlake/romstage/fsp_params.c
+++ b/src/soc/intel/elkhartlake/romstage/fsp_params.c
@@ -25,7 +25,7 @@
    mainboard_memory_init_params(mupd);
 }

-void mainboard_memory_init_params(FSPM_UPD *mupd)
+__weak void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
    /* TODO: Update later together with UPD updates */
 }