Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39166 )
Change subject: mb/google/dedede: Add PCIe Root Port Configuration
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Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39166/1/src/mainboard/google/dedede...
File src/mainboard/google/dedede/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39166/1/src/mainboard/google/dedede...
PS1, Line 96: "PcieClkSrcClkReq[0]" = "0"
Aamir@: Should it be 0 or 0xff here?
register "PcieClkSrcClkReq[0]" = "0"
register "PcieClkSrcClkReq[1]" = "1"
register "PcieClkSrcClkReq[2]" = "2"
register "PcieClkSrcClkReq[3]" = "3"
register "PcieClkSrcClkReq[4]" = "4"
register "PcieClkSrcClkReq[5]" = "5"
This would be invalidated based on unused PcieClkSrcUsage.
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Gerrit-Project: coreboot
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