Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44461 )
Change subject: vc/amd/agesa/f16kb: raise the DDR3 UDIMM Freq limit 1333MHz values to 1600MHz ......................................................................
vc/amd/agesa/f16kb: raise the DDR3 UDIMM Freq limit 1333MHz values to 1600MHz
AMD f16kb boards should be perfectly capable of working at 1600MHz RAM speeds even with two DDR3 UDIMM modules. These low 1333MHz limits aren't justified, should raise them to 1600MHz and let the memory training code to do the rest.
Successfully tested on ASUS AM1I-A and two Crucial BLT8G3D1869DT1TX0 UDIMMs, together with the other related AMD_XMP changes which help to enable 1600MHz.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I2a9da4e594ab3dc38b5ba87520633cbd01c9ce01 --- M src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c 1 file changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/44461/1
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c index 7e9b64e..3bc99bf 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c @@ -92,8 +92,8 @@ {{_2DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, {{_2DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, {{_2DIMM, 2, 2, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 1, 1, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 0, 2, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 1, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 0, 2, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, }; CONST PSC_TBL_ENTRY KBMaxFreqTblEntU6L = { {PSCFG_MAXFREQ, UDIMM_TYPE, _1DIMM + _2DIMM, {AMD_FAMILY_16_KB, AMD_F16_ALL}, PT_DONT_CARE, DDR3_TECHNOLOGY}, @@ -111,8 +111,8 @@ {{_2DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, {{_2DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, {{_2DIMM, 2, 2, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 1, 1, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 0, 2, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 1, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 0, 2, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, }; CONST PSC_TBL_ENTRY KBMaxFreqTblEntMicroSrvU6L = { {PSCFG_MAXFREQ, UDIMM_TYPE, _1DIMM + _2DIMM, {AMD_FAMILY_16_KB, AMD_F16_ALL}, PT_DONT_CARE, DDR3_TECHNOLOGY}, @@ -130,8 +130,8 @@ {{_2DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, {{_2DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, {{_2DIMM, 2, 2, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 1, 1, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 0, 2, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 1, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 0, 2, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, }; CONST PSC_TBL_ENTRY KBMaxFreqTblEntU4L = { {PSCFG_MAXFREQ, UDIMM_TYPE, _1DIMM + _2DIMM, {AMD_FAMILY_16_KB, AMD_F16_ALL}, PT_DONT_CARE, DDR3_TECHNOLOGY},