Aaron Durbin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37962 )
Change subject: spi-generic: remove SPI_FLASH_SECTOR_ERASE_TIMEOUT_MS ......................................................................
spi-generic: remove SPI_FLASH_SECTOR_ERASE_TIMEOUT_MS
There was one user of SPI_FLASH_SECTOR_ERASE_TIMEOUT_MS, southbridge/intel/common/spi.c. Remove the define and encode the 1 second timeout that it was wanting at the single use site.
Change-Id: If33a1a04bc4d3441e90bf0ca305ddf71c4f8bb88 Signed-off-by: Aaron Durbin adurbin@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/37962 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/include/spi-generic.h M src/southbridge/intel/common/spi.c 2 files changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h index c8dbb67..926bd11 100644 --- a/src/include/spi-generic.h +++ b/src/include/spi-generic.h @@ -22,7 +22,6 @@ */ #define SPI_FLASH_PROG_TIMEOUT_MS 200 #define SPI_FLASH_PAGE_ERASE_TIMEOUT_MS 500 -#define SPI_FLASH_SECTOR_ERASE_TIMEOUT_MS 1000
#include <commonlib/region.h> #include <stdint.h> diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 63206d0..924fdcc 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -31,6 +31,7 @@ #include <device/pci.h> #include <spi_flash.h> #include <spi-generic.h> +#include <timer.h>
#include "spi.h"
@@ -739,7 +740,7 @@ u32 start, end, erase_size; int ret; uint16_t hsfc; - unsigned int timeout = 1000 * SPI_FLASH_SECTOR_ERASE_TIMEOUT_MS; + unsigned int timeout = 1000 * USECS_PER_MSEC; /* 1 second timeout */
erase_size = flash->sector_size; if (offset % erase_size || len % erase_size) {