[coreboot-gerrit] [XS] Change in coreboot[main]: TEST: use dcfg config to control thermal tuning mechanism

[Sumeet R Pawnikar (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun.

Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81345?usp=email )

Change subject: TEST: use dcfg config to control thermal tuning mechanism
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TEST: use dcfg config to control thermal tuning mechanism

This is an example on how to use dcfg config to control the thermal
tuning mechanism on specific platform.

BUG=b:272382080
TEST=Build, boot on rex board and dump SSDT to check DCFG method.
     Also, verified the value over sysfs attribute "production_mode"
     present under /sys/bus/platform/devices/INTC1042:00 path.

Change-Id: I12c84d16102c1678c8f0162af15f34587c978028
Signed-off-by: Sumeet Pawnikar 
---
M src/mainboard/google/rex/variants/rex0/overridetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/81345/1

diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb
index 12068ce..55e39b2 100644
--- a/src/mainboard/google/rex/variants/rex0/overridetree.cb
+++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb
@@ -176,6 +176,9 @@
    	end # Integrated Graphics Device
    	device ref dtt on
    		chip drivers/intel/dptf
+
+				register "dcfg" = "5"
+
    			## sensor information
    			register "options.tsr[0].desc" = ""DDR_SOC""
    			register "options.tsr[1].desc" = ""Ambient""