[coreboot-gerrit] Change in ...coreboot[master]: binaryPI: Fix cache coherency use for AP CPUs

[Michał Żygowski (Code Review)]

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26115 )

Change subject: binaryPI: Fix cache coherency use for AP CPUs
......................................................................

Patch Set 8: Code-Review+2

I confirm the patch resolves the issue with cbmem console and early SMP squelching.

Although still cbmem utility reports:
*** Pre-CBMEM romstage console overflowed, log truncated! ***

Is there not enough "space" during CAR to store the whole log? Tried setting cbmem console area size to 256KiB, but it seems not to be the case.