Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47049 )
Change subject: mb/google/volteer: Skip TPM detection except on SPI ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47049/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47049/7//COMMIT_MSG@19 PS7, Line 19: can be made to support : longer interrupts
But what about when the next SoC generation comes out and has totally different requirements? If we' […]
Actually, if we are thinking long term. Rather than having the GSC generate a fixed length pulse, I would rather that it asserts the interrupt line, and keeps it asserted indefinitely, when it has something to say. Then when the AP starts using the SPI/I2C bus to hear what the GSC wanted, that is when the interrupt signal should go de-asserted.
If done that way, no matter what future requirement comes up for the length of interrupt pulses, it will automatically be satisfied with no active effort.
As we are starting from a clean slate with Dauntless/Ti50, and are looking at following the TPM standard for interrupt signals, I hope that we can arrive at such a state. I do not yet know exactly what that would look like, but I am certain that there should be no need for communication in early ramstage, to set up the AP chipset depending on GSC firmware version.