[coreboot-gerrit] Change in coreboot[master]: lib/spd_bin: Extend DDR4 spd information

[EricR Lai (Code Review)]

Hello Julius Werner, Mathew King, Tim Wawrzynczak, Duncan Laurie, build bot (Jenkins), Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35206

to look at the new patch set (#13).

Change subject: lib/spd_bin: Extend DDR4 spd information
......................................................................

lib/spd_bin: Extend DDR4 spd information

From DDR4 SPD spec:

Byte 4 (0x004): SDRAM Density and Banks
Bits [7, 6]:
00 = 0 (no bank groups)
01 = 1 (2 bank groups)
10 = 2 (4 bank groups)
11 = reserved

Bit [5, 4] :
00 = 2 (4 banks)
01 = 3 (8 banks)
All others reserved

Separate DDR3 and DDR4 banks. And extened capmb, rows, cols and ranks.
Separate DDR3 and DDR4 ORGANIZATION/BUS_DEV_WIDTH offset.

Signed-off-by: Eric Lai 
Change-Id: I5f56975ce73d8ed2d4de7d9fd08e5ae86993e731
---
M src/include/spd_bin.h
M src/lib/spd_bin.c
M src/mainboard/google/cyan/spd/spd.c
3 files changed, 127 insertions(+), 34 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/35206/13