Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32233 )
Change subject: chromeos: clean up "recovery" and "write protect" GPIOs ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@15 PS1, Line 15: The cached value of the "recovery" GPIO is read only on certain : boards which have a physical recovery switch.
It actually isn't at all right now, because the "recovery" GPIO isn't installed with resample_at_run […]
Boards might have different ways of reporting recovery switches. The latest example is sarien where it has a GPIO but also other ways for identifying recovery mode request. So, we need to be careful about that.
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@18 PS1, Line 18: Most of these inaccuracies are from : non-inverted values on ACTIVE_LOW GPIOs.
We should take the "recovery" out completely if it doesn't need to be resampled (see above). […]
+1 to what you said about letting depthcharge read the GPIO state for write-protect.