Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61649 )
Change subject: soc/intel/common/pmc: Add `finalize` operation for pmc ......................................................................
soc/intel/common/pmc: Add `finalize` operation for pmc
This patch implements the required operations to perform prior to booting to OS using coreboot native driver when platform decides to skip FSP notify APIs i.e. Ready to Boot and End Of Firmware.
BUG=b:211954778 TEST=Able to build brya with these changes.
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: I0a0b869849d5d8c76031b8999f3d28817ac69247 --- M src/soc/intel/common/block/pmc/pmc.c 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/61649/1
diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c index 560ab9b..e74cfd1 100644 --- a/src/soc/intel/common/block/pmc/pmc.c +++ b/src/soc/intel/common/block/pmc/pmc.c @@ -8,6 +8,7 @@ #include <intelblocks/acpi.h> #include <intelblocks/pmc.h> #include <soc/pci_devs.h> +#include <soc/pm.h>
static void pch_pmc_add_new_resource(struct device *dev, uint8_t offset, uintptr_t base, size_t size, @@ -80,6 +81,18 @@ generate_acpi_power_engine(); }
+/* + * `pmc_final` function is native implementation of equivalent events performed by + * each FSP NotifyPhase() API invocations. + * + * Clear PMCON status bits (Global Reset/Power Failure/Host Reset Status bits). + */ +static void pmc_final(struct device *dev) +{ + if (CONFIG(SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE)) + pmc_clear_pmcon_sts(); +} + static struct device_operations device_ops = { .read_resources = pch_pmc_read_resources, .set_resources = pci_dev_set_resources, @@ -87,6 +100,7 @@ .init = pmc_soc_init, .ops_pci = &pci_dev_ops_pci, .scan_bus = scan_static_bus, + .final = pmc_final, #if CONFIG(HAVE_ACPI_TABLES) .acpi_fill_ssdt = pmc_fill_ssdt, #endif