Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40730 )
Change subject: mb/tiogapass: exclude the consequences of reconfig GPIO in FSP-M ......................................................................
mb/tiogapass: exclude the consequences of reconfig GPIO in FSP-M
FSP-M can reconfigure the GPIO controller inside Lewisburg PCH. Since FSP-M is provided as a binary file, we will not be able to change the contents inside of this file. We should be sure that after romstage the pads will be configured according to the configuration from gpio.h only. This patch reconfigures the GPIO to ramstage.
Change-Id: I2959711db45eaa034c9c2dec1d64b0394efdbb71 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/ocp/tiogapass/ramstage.c 1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/40730/1
diff --git a/src/mainboard/ocp/tiogapass/ramstage.c b/src/mainboard/ocp/tiogapass/ramstage.c index 16b4fd9..fba1d80 100644 --- a/src/mainboard/ocp/tiogapass/ramstage.c +++ b/src/mainboard/ocp/tiogapass/ramstage.c @@ -14,11 +14,12 @@ */ #include <soc/ramstage.h> #include <bootstate.h> -#include <gpio.h> -#include <soc/lewisburg_pch_gpio_defs.h> +#include "gpio.h"
void mainboard_silicon_init_params(FSPS_UPD *params) { + /* configure Lewisburg PCH GPIO controller after FSP-M */ + gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); }
static void pull_post_complete_pin(void *unused)