Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81538?usp=email )
Change subject: tree: Get rid of some casts ......................................................................
tree: Get rid of some casts
Change-Id: Ic81702ddf18d32a479a9388a4d6fde0f72a405b7 Signed-off-by: Elyes Haouas ehaouas@noos.fr --- M src/drivers/intel/fsp1_1/vbt.c M src/soc/amd/common/block/graphics/graphics.c M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/apollolake/chip.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/common/vbt.c M src/soc/intel/common/vbt.h M src/soc/intel/elkhartlake/fsp_params.c M src/soc/intel/jasperlake/fsp_params.c M src/soc/intel/meteorlake/fsp_params.c M src/soc/intel/skylake/chip.c M src/soc/intel/tigerlake/fsp_params.c 12 files changed, 13 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/81538/1
diff --git a/src/drivers/intel/fsp1_1/vbt.c b/src/drivers/intel/fsp1_1/vbt.c index 37471e5..2043834 100644 --- a/src/drivers/intel/fsp1_1/vbt.c +++ b/src/drivers/intel/fsp1_1/vbt.c @@ -34,5 +34,5 @@ } else { printk(BIOS_DEBUG, "Not passing VBT to GOP\n"); } - params->GraphicsConfigPtr = (u32)vbt_data; + params->GraphicsConfigPtr = vbt_data; } diff --git a/src/soc/amd/common/block/graphics/graphics.c b/src/soc/amd/common/block/graphics/graphics.c index ea7308a..71490eaa 100644 --- a/src/soc/amd/common/block/graphics/graphics.c +++ b/src/soc/amd/common/block/graphics/graphics.c @@ -151,7 +151,7 @@ * vbt_get() function to not break the build with GOP driver enabled * (see fsps_return_value_handler() in fsp2_0/silicon_init.c */ -void *vbt_get(void) +uintptr_t vbt_get(void) { return NULL; } diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 33ebee3..462a065 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -638,7 +638,7 @@ const struct soc_intel_alderlake_config *config) { /* Load VBT before devicetree-specific config. */ - s_cfg->GraphicsConfigPtr = (uintptr_t)vbt_get(); + s_cfg->GraphicsConfigPtr = vbt_get();
/* Check if IGD is present and fill Graphics init param accordingly */ s_cfg->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_devfn_enabled(SA_DEVFN_IGD); diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 15780d0..1c57193 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -643,7 +643,7 @@ struct device *dev;
/* Load VBT before devicetree-specific config. */ - silconfig->GraphicsConfigPtr = (uintptr_t)vbt_get(); + silconfig->GraphicsConfigPtr = vbt_get();
dev = pcidev_path_on_root(SA_DEVFN_ROOT); cfg = config_of(dev); diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index c9ef548..bbae400 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -340,7 +340,7 @@ parse_devicetree(config, params);
/* Load VBT before devicetree-specific config. */ - params->GraphicsConfigPtr = (uintptr_t)vbt_get(); + params->GraphicsConfigPtr = vbt_get();
mainboard_silicon_init_params(supd);
diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c index c01db66..6ab1a45 100644 --- a/src/soc/intel/common/vbt.c +++ b/src/soc/intel/common/vbt.c @@ -7,7 +7,7 @@
#include "vbt.h"
-void *vbt_get(void) +uintptr_t vbt_get(void) { if (!CONFIG(RUN_FSP_GOP)) return NULL; diff --git a/src/soc/intel/common/vbt.h b/src/soc/intel/common/vbt.h index 5cbb2c7..a80ec81 100644 --- a/src/soc/intel/common/vbt.h +++ b/src/soc/intel/common/vbt.h @@ -9,5 +9,5 @@ * Returns VBT pointer and mapping after checking prerequisites for Pre OS * Graphics initialization */ -void *vbt_get(void); +uintptr_t vbt_get(void); #endif diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c index 5e1bba7..b11295d 100644 --- a/src/soc/intel/elkhartlake/fsp_params.c +++ b/src/soc/intel/elkhartlake/fsp_params.c @@ -253,7 +253,7 @@ parse_devicetree(params);
/* Load VBT before devicetree-specific config. */ - params->GraphicsConfigPtr = (uintptr_t)vbt_get(); + params->GraphicsConfigPtr = vbt_get();
/* Check if IGD is present and fill Graphics init param accordingly */ params->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_devfn_enabled(SA_DEVFN_IGD); diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c index 50fc136..a48085f 100644 --- a/src/soc/intel/jasperlake/fsp_params.c +++ b/src/soc/intel/jasperlake/fsp_params.c @@ -58,7 +58,7 @@ parse_devicetree(params);
/* Load VBT before devicetree-specific config. */ - params->GraphicsConfigPtr = (uintptr_t)vbt_get(); + params->GraphicsConfigPtr = vbt_get();
/* Check if IGD is present and fill Graphics init param accordingly */ params->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_devfn_enabled(SA_DEVFN_IGD); diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index a02d4b9..233cdde 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -410,7 +410,7 @@ const struct soc_intel_meteorlake_config *config) { /* Load VBT before devicetree-specific config. */ - s_cfg->GraphicsConfigPtr = (uintptr_t)vbt_get(); + s_cfg->GraphicsConfigPtr = vbt_get();
/* Check if IGD is present and fill Graphics init param accordingly */ s_cfg->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_devfn_enabled(PCI_DEVFN_IGD); diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index ea091ce..b92805d 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -223,7 +223,7 @@ FSP_S_CONFIG *params = &supd->FspsConfig; FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig; struct soc_intel_skylake_config *config; - uintptr_t vbt_data = (uintptr_t)vbt_get(); + uintptr_t vbt_data = vbt_get(); int i;
config = config_of_soc(); @@ -240,7 +240,7 @@ printk(BIOS_DEBUG, "psys_pmax = %d\n", tconfig->PsysPmax); }
- params->GraphicsConfigPtr = (u32)vbt_data; + params->GraphicsConfigPtr = vbt_data;
for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) { params->PortUsb20Enable[i] = diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 3326935..b29a51b 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -312,7 +312,7 @@ parse_devicetree(params);
/* Load VBT before devicetree-specific config. */ - params->GraphicsConfigPtr = (uintptr_t)vbt_get(); + params->GraphicsConfigPtr = vbt_get();
/* Check if IGD is present and fill Graphics init param accordingly */ params->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_devfn_enabled(SA_DEVFN_IGD);