[coreboot-gerrit] Change in coreboot[master]: mb/starlabs/labtop: Update CNVi GPIOs

[Sean Rhodes (Code Review)]

Sean Rhodes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60758 )

Change subject: mb/starlabs/labtop: Update CNVi GPIOs
......................................................................

mb/starlabs/labtop: Update CNVi GPIOs

Update GPIOs from the AMI port, so they are correctly configured.

Signed-off-by: Sean Rhodes 
Change-Id: I9fc9963e91da0267c8740fee20a3ec41895b4953
---
M src/mainboard/starlabs/labtop/variants/tgl/gpio.c
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/60758/1

diff --git a/src/mainboard/starlabs/labtop/variants/tgl/gpio.c b/src/mainboard/starlabs/labtop/variants/tgl/gpio.c
index 8ae3875..b15aa6b 100644
--- a/src/mainboard/starlabs/labtop/variants/tgl/gpio.c
+++ b/src/mainboard/starlabs/labtop/variants/tgl/gpio.c
@@ -279,15 +279,15 @@
    /* F0:	CNV_BRI_DT_BT_UART0_RTS_R	*/
    PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
    /* F1:	CNV_BRI_RSP_BT_UART0_RX_R	*/
-	PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1),
    /* F2:	CNV_RGI_DT_BT_UART0_TX_R	*/
    PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
    /* F3:	CNV_RGI_RSP_BT_UART0_CTS	*/
-	PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
+	PAD_CFG_NF(GPP_F3, NONE, DEEP, NF1),
    /* F4:	Not Connected			*/
    PAD_NC(GPP_F4, NONE),
    /* F5:	GPPC_F5_MODEM_CLKREQ		*/
-	PAD_CFG_NF(GPP_F5, NONE, DEEP, NF3),
+	PAD_NC(GPP_F5, NONE),
    /* F6:	Not Connected			*/
    PAD_NC(GPP_F6, NONE),
    /* F7:	BIOS_REC			*/