Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43010 )
Change subject: soc/amd/common: fix eSPI virtual wire polarity encoding ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43010/1/src/soc/amd/common/block/in... File src/soc/amd/common/block/include/amdblocks/espi.h:
https://review.coreboot.org/c/coreboot/+/43010/1/src/soc/amd/common/block/in... PS1, Line 46: eSPI interrupts are active level high signals
Is this defined in the eSPI spec? I don't remember seeing that.
yes. https://www.intel.com/content/dam/support/us/en/documents/software/chipset-s...
"Interrupt level high (‘1’) indicates interrupt assertion whereas interrupt level low (‘0’) indicates interrupt deassertion. Interrupt events virtual wires are active high."
Section 5.2.2.4 Interrupt Event has all the fun details.