Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47852 )
Change subject: lenovo/g505s: properly program the IRQ tables ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47852/3/src/mainboard/lenovo/g505s/... File src/mainboard/lenovo/g505s/Kconfig:
https://review.coreboot.org/c/coreboot/+/47852/3/src/mainboard/lenovo/g505s/... PS3, Line 51: config IRQ_SLOT_COUNT : int : default 14
Is this board or chipset specific?
It's board specific: basically, a number of entries at irq_tables.c structure.
https://review.coreboot.org/c/coreboot/+/47852/3/src/mainboard/lenovo/g505s/... File src/mainboard/lenovo/g505s/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/47852/3/src/mainboard/lenovo/g505s/... PS3, Line 44: device pci 14.5 on end # USB 2
It looks like, this should be in a separate commit?
It's hard to separate because this change affects all these IRQ tables and its' checksum. But I added more description in a commit message about this.