Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32667 )
Change subject: {arch, console, drivers, include, lib, soc}: Add new features in postcar
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Patch Set 8:
I don't like the fact that CONFIG_SKIP_RAMSTAGE not only skips ramstage, but also includes a bunch of code and guarding logic to postcar stage. It's more like a CONFIG_COMBINED_POSTCAR_RAMSTAGE_LITE
Up to this point no numbers where presented, how much slower a reduced ramstage would be (a quick hacked version which doesn't run PCI or FSP-S). Of course ramstage size matters here, but the linkers ability of dead code elemination should help a lot.
Also adding more code to postcar will increase loading times, too.
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