Attention is currently required from: Sean Rhodes, Tarun Tuli, Subrata Banik, Christian Walter, Maximilian Brune, Angel Pons, Lean Sheng Tan.
Hello build bot (Jenkins), Sean Rhodes, Tarun Tuli, Subrata Banik, Christian Walter, Maximilian Brune, Angel Pons, Lean Sheng Tan,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/73902
to review the following change.
Change subject: Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT" ......................................................................
Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT"
This reverts commit 6bfca1b689e48be4f72e8fa401f3558d845fc282.
Reason for revert: tbd
Change-Id: I56bab4d85d04e90cacfe77db59d0cde6a8a75949 --- M src/mainboard/prodrive/atlas/Kconfig M src/mainboard/starlabs/starbook/Kconfig M src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/tigerlake/fsp_params.c 5 files changed, 19 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/73902/1
diff --git a/src/mainboard/prodrive/atlas/Kconfig b/src/mainboard/prodrive/atlas/Kconfig index e36f195..eda23cb 100644 --- a/src/mainboard/prodrive/atlas/Kconfig +++ b/src/mainboard/prodrive/atlas/Kconfig @@ -9,9 +9,9 @@ select MAINBOARD_HAS_TPM2 select MAINBOARD_USES_IFD_EC_REGION select MEMORY_MAPPED_TPM - select NO_S0IX_SUPPORT select PCIEXP_SUPPORT_RESIZABLE_BARS select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_ALDERLAKE_S3
if BOARD_PRODRIVE_ATLAS_BASEBOARD
diff --git a/src/mainboard/starlabs/starbook/Kconfig b/src/mainboard/starlabs/starbook/Kconfig index 807b6a9..5b91496 100644 --- a/src/mainboard/starlabs/starbook/Kconfig +++ b/src/mainboard/starlabs/starbook/Kconfig @@ -10,7 +10,6 @@ select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_TPM2 - select NO_S0IX_SUPPORT select NO_UART_ON_SUPERIO select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SYSTEM_TYPE_LAPTOP @@ -51,6 +50,7 @@ select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES select SOC_INTEL_TIGERLAKE + select SOC_INTEL_TIGERLAKE_S3 select SPI_FLASH_WINBOND select TPM_MEASURED_BOOT
@@ -65,6 +65,7 @@ select MEMORY_MAPPED_TPM select SOC_INTEL_ALDERLAKE select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_ALDERLAKE_S3 select SPI_FLASH_WINBOND select TPM_MEASURED_BOOT select PCIEXP_SUPPORT_RESIZABLE_BARS diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb index c3a3f45..cd8c480 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb @@ -19,6 +19,7 @@ register "CnviBtAudioOffload" = "1" register "enable_c6dram" = "1" register "SaGv" = "SaGv_Enabled" + register "TcssD3ColdDisable" = "1"
# FSP Silicon # Serial I/O diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index aa8de99..42475c4 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -648,7 +648,7 @@
/* D3Hot and D3Cold for TCSS */ s_cfg->D3HotEnable = !config->tcss_d3_hot_disable; - s_cfg->D3ColdEnable = CONFIG(D3COLD_SUPPORT) && !config->tcss_d3_cold_disable; + s_cfg->D3ColdEnable = !CONFIG(SOC_INTEL_ALDERLAKE_S3) && !config->tcss_d3_cold_disable;
s_cfg->UsbTcPortEn = 0; for (int i = 0; i < MAX_TYPE_C_PORTS; i++) { diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index a10db87..b823f50 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -323,12 +323,11 @@
/* D3Hot and D3Cold for TCSS */ params->D3HotEnable = !config->TcssD3HotDisable; - cpu_id = cpu_get_cpuid(); if (cpu_id == CPUID_TIGERLAKE_A0) params->D3ColdEnable = 0; else - params->D3ColdEnable = CONFIG(D3COLD_SUPPORT); + params->D3ColdEnable = !config->TcssD3ColdDisable;
params->UsbTcPortEn = config->UsbTcPortEn; params->TcssAuxOri = config->TcssAuxOri;