[coreboot-gerrit] Change in coreboot[master]: mb/google/{beltino,jecht}: Drop SIO configuration lines

[Nico Huber (Code Review)]

Hello Matt DeVillier,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/38032

to review the following change.

Change subject: mb/google/{beltino,jecht}: Drop SIO configuration lines
......................................................................

mb/google/{beltino,jecht}: Drop SIO configuration lines

These are meaningless for boards without SIO devices.

Change-Id: I252bba6ff1a2547fd0661ad3076470376e95bdd6
Signed-off-by: Nico Huber 
---
M src/mainboard/google/beltino/devicetree.cb
M src/mainboard/google/jecht/devicetree.cb
2 files changed, 0 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/38032/1

diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb
index 89758dd..f4c9e85 100644
--- a/src/mainboard/google/beltino/devicetree.cb
+++ b/src/mainboard/google/beltino/devicetree.cb
@@ -55,10 +55,6 @@
    		register "sata_port_map" = "0x1"
    		register "sata_devslp_disable" = "0x1"

-			register "sio_acpi_mode" = "0"
-			register "sio_i2c0_voltage" = "0" # 3.3V
-			register "sio_i2c1_voltage" = "0" # 3.3V
-
    		# Force enable ASPM for PCIe Port 4
    		register "pcie_port_force_aspm" = "0x10"

diff --git a/src/mainboard/google/jecht/devicetree.cb b/src/mainboard/google/jecht/devicetree.cb
index d34bf7a..19d0c48 100644
--- a/src/mainboard/google/jecht/devicetree.cb
+++ b/src/mainboard/google/jecht/devicetree.cb
@@ -30,10 +30,6 @@
    register "sata_port_map" = "0x1"
    register "sata_devslp_disable" = "0x1"

-	register "sio_acpi_mode" = "0"
-	register "sio_i2c0_voltage" = "0" # 3.3V
-	register "sio_i2c1_voltage" = "0" # 3.3V
-
    # Force enable ASPM for PCIe Port 4
    register "pcie_port_force_aspm" = "0x10"