build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47076 )
Change subject: sc7280: Add clock driver ......................................................................
Patch Set 1:
(5 comments)
https://review.coreboot.org/c/coreboot/+/47076/1/src/soc/qualcomm/sc7280/clo... File src/soc/qualcomm/sc7280/clock.c:
https://review.coreboot.org/c/coreboot/+/47076/1/src/soc/qualcomm/sc7280/clo... PS1, Line 104: BIT(CLK_CTL_GPLL_PCODE_OFFET_28) | 'OFFET' may be misspelled - perhaps 'OFFSET'?
https://review.coreboot.org/c/coreboot/+/47076/1/src/soc/qualcomm/sc7280/clo... PS1, Line 105: BIT(CLK_CTL_GPLL_PCODE_OFFET_29)); 'OFFET' may be misspelled - perhaps 'OFFSET'?
https://review.coreboot.org/c/coreboot/+/47076/1/src/soc/qualcomm/sc7280/clo... PS1, Line 278: if(qup == 14 || qup == 15) space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/47076/1/src/soc/qualcomm/sc7280/inc... File src/soc/qualcomm/sc7280/include/soc/clock.h:
https://review.coreboot.org/c/coreboot/+/47076/1/src/soc/qualcomm/sc7280/inc... PS1, Line 136: CLK_CTL_GPLL_PCODE_OFFET_28 = 28, 'OFFET' may be misspelled - perhaps 'OFFSET'?
https://review.coreboot.org/c/coreboot/+/47076/1/src/soc/qualcomm/sc7280/inc... PS1, Line 137: CLK_CTL_GPLL_PCODE_OFFET_29 = 29, 'OFFET' may be misspelled - perhaps 'OFFSET'?