[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Include uart.c unconditionally

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42339 )

Change subject: soc/amd/picasso: Include uart.c unconditionally
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soc/amd/picasso: Include uart.c unconditionally

This change includes uart.c in bootblock, romstage, ramstage and
verstage unconditionally because this file is handling more than just
the UART console configuration. This allows boards to take advantage
of picasso_uart_mmio_ops even if PICASSO_UART is not selected. If the
functions within the file are unused, they will be optimized out by
the linker.

BUG=b:158346697

Change-Id: If1173034b0d2ed32f77241768e1e8abb208aac3a
Signed-off-by: Furquan Shaikh 
---
M src/soc/amd/picasso/Makefile.inc
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/42339/1

diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 7fce124..d7d1082 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -14,7 +14,7 @@
 bootblock-y += bootblock/bootblock.c
 bootblock-y += southbridge.c
 bootblock-y += i2c.c
-bootblock-$(CONFIG_PICASSO_UART) += uart.c
+bootblock-y += uart.c
 bootblock-y += tsc_freq.c
 bootblock-y += gpio.c
 bootblock-y += smi_util.c
@@ -25,7 +25,7 @@
 romstage-y += gpio.c
 romstage-y += pmutil.c
 romstage-y += memmap.c
-romstage-$(CONFIG_PICASSO_UART) += uart.c
+romstage-y += uart.c
 romstage-y += tsc_freq.c
 romstage-y += southbridge.c
 romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
@@ -37,7 +37,7 @@
 verstage-y += i2c.c
 verstage-y += pmutil.c
 verstage-y += config.c
-verstage-$(CONFIG_PICASSO_UART) += uart.c
+verstage-y += uart.c
 verstage-y += tsc_freq.c

ramstage-y += i2c.c
@@ -56,7 +56,7 @@
 ramstage-y += memmap.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
-ramstage-$(CONFIG_PICASSO_UART) += uart.c
+ramstage-y += uart.c
 ramstage-y += usb.c
 ramstage-y += tsc_freq.c
 ramstage-y += finalize.c