build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30977 )
Change subject: [NOTFORMERGE] intel/d945gclf board fork attempt ......................................................................
Patch Set 1:
(76 comments)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... File src/mainboard/advantech/som4461/irq_tables.c:
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 31: /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 32: {0x00,(0x01 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // PCIe? line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 32: {0x00,(0x01 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // PCIe? space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 32: {0x00,(0x01 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // PCIe? space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 33: {0x00,(0x02 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // VGA line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 33: {0x00,(0x02 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // VGA space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 33: {0x00,(0x02 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // VGA space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 34: {0x00,(0x1e << 3)|0x0, {{0x61, 0xdcf8}, {0x68, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // PCI bridge line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 34: {0x00,(0x1e << 3)|0x0, {{0x61, 0xdcf8}, {0x68, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // PCI bridge space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 34: {0x00,(0x1e << 3)|0x0, {{0x61, 0xdcf8}, {0x68, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // PCI bridge space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 35: {0x00,(0x1f << 3)|0x0, {{0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // LPC line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 35: {0x00,(0x1f << 3)|0x0, {{0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // LPC space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 35: {0x00,(0x1f << 3)|0x0, {{0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // LPC space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 36: {0x00,(0x1d << 3)|0x0, {{0x6b, 0xdcf8}, {0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x60, 0x0dcf8}}, 0x0, 0x0}, // USB#1 line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 36: {0x00,(0x1d << 3)|0x0, {{0x6b, 0xdcf8}, {0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x60, 0x0dcf8}}, 0x0, 0x0}, // USB#1 space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 36: {0x00,(0x1d << 3)|0x0, {{0x6b, 0xdcf8}, {0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x60, 0x0dcf8}}, 0x0, 0x0}, // USB#1 space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 37: {0x00,(0x1b << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Audio device line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 37: {0x00,(0x1b << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Audio device space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 37: {0x00,(0x1b << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Audio device space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 38: {0x00,(0x1c << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x2, 0x0}, // PCIe bridge line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 38: {0x00,(0x1c << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x2, 0x0}, // PCIe bridge space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 38: {0x00,(0x1c << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x2, 0x0}, // PCIe bridge space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 39: {0x04,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Firewire line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 39: {0x04,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Firewire space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 39: {0x04,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Firewire space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 40: {0x04,(0x01 << 3)|0x0, {{0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0x0dcf8}}, 0x1, 0x0}, // PCI Bridge line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 40: {0x04,(0x01 << 3)|0x0, {{0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0x0dcf8}}, 0x1, 0x0}, // PCI Bridge space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 40: {0x04,(0x01 << 3)|0x0, {{0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0x0dcf8}}, 0x1, 0x0}, // PCI Bridge space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 41: {0x04,(0x02 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x2, 0x0}, line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 41: {0x04,(0x02 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x2, 0x0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 41: {0x04,(0x02 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x2, 0x0}, space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 42: {0x04,(0x03 << 3)|0x0, {{0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0x0dcf8}}, 0x3, 0x0}, line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 42: {0x04,(0x03 << 3)|0x0, {{0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0x0dcf8}}, 0x3, 0x0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 42: {0x04,(0x03 << 3)|0x0, {{0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0x0dcf8}}, 0x3, 0x0}, space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 43: {0x04,(0x04 << 3)|0x0, {{0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0x0dcf8}}, 0x4, 0x0}, line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 43: {0x04,(0x04 << 3)|0x0, {{0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0x0dcf8}}, 0x4, 0x0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 43: {0x04,(0x04 << 3)|0x0, {{0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0x0dcf8}}, 0x4, 0x0}, space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 44: {0x04,(0x05 << 3)|0x0, {{0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0x0dcf8}}, 0x5, 0x0}, line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 44: {0x04,(0x05 << 3)|0x0, {{0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0x0dcf8}}, 0x5, 0x0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 44: {0x04,(0x05 << 3)|0x0, {{0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0x0dcf8}}, 0x5, 0x0}, space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 45: {0x04,(0x06 << 3)|0x0, {{0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0xdcf8}, {0x63, 0x0dcd8}}, 0x6, 0x0}, line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 45: {0x04,(0x06 << 3)|0x0, {{0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0xdcf8}, {0x63, 0x0dcd8}}, 0x6, 0x0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 45: {0x04,(0x06 << 3)|0x0, {{0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0xdcf8}, {0x63, 0x0dcd8}}, 0x6, 0x0}, space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 46: {0x04,(0x09 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x9, 0x0}, line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 46: {0x04,(0x09 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x9, 0x0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 46: {0x04,(0x09 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x9, 0x0}, space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 47: {0x01,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // Ethernet 8168 line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 47: {0x01,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // Ethernet 8168 space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 47: {0x01,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // Ethernet 8168 space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 48: {0x02,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x9, 0x0}, line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 48: {0x02,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x9, 0x0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 48: {0x02,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x9, 0x0}, space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 49: {0x03,(0x00 << 3)|0x0, {{0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x60, 0x0dcf8}}, 0xa, 0x0}, line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 49: {0x03,(0x00 << 3)|0x0, {{0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x60, 0x0dcf8}}, 0xa, 0x0}, space required after that ',' (ctx:VxV)
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/irq_... PS1, Line 49: {0x03,(0x00 << 3)|0x0, {{0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x60, 0x0dcf8}}, 0xa, 0x0}, space required after that close brace '}'
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... File src/mainboard/advantech/som4461/mptable.c:
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 44: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x8, 0x2, 0x10); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 45: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x7d, 0x2, 0x13); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 46: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x74, 0x2, 0x17); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 47: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x75, 0x2, 0x13); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 48: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x76, 0x2, 0x12); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 49: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x77, 0x2, 0x10); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 50: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x6c, 0x2, 0x10); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 51: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x70, 0x2, 0x10); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 52: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x0, 0x71, 0x2, 0x11); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 55: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x4, 0x0, 0x2, 0x10); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 59: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x5, 0x20, 0x2, 0x14); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 61: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x5, 0x24, 0x2, 0x15); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 63: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x5, 0x28, 0x2, 0x16); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 66: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x5, 0x30, 0x2, 0x14); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 67: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x5, 0x34, 0x2, 0x15); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 68: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x5, 0x38, 0x2, 0x16); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 71: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10); line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/mpta... PS1, Line 73: /* Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ line over 80 characters
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/roms... File src/mainboard/advantech/som4461/romstage.c:
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/roms... PS1, Line 130: winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); code indent should use tabs where possible
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/roms... PS1, Line 130: winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); please, no spaces at the start of a line
https://review.coreboot.org/#/c/30977/1/src/mainboard/advantech/som4461/roms... PS1, Line 138: if (MCHBAR16(SSKPD) == 0xCAFE) that open brace { should be on the previous line