[coreboot-gerrit] Change in ...coreboot[master]: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

[Nico Huber (Code Review)]

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field.

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/31416
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 8 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index c0545ce..f816647 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -371,14 +371,17 @@
 #endif
 #endif /* CONFIG_CHROMEOS */

-	/* As a work around to prevent a compiler error, temporarily specify
-	 * 16 MiB flash sizes when ROM size >= 16 MiB.  An update is necessary
-	 * once the SMBIOS specification addresses ROM sizes > 16 MiB.
-	 */
    uint32_t rom_size = CONFIG_ROM_SIZE;
    rom_size = MIN(CONFIG_ROM_SIZE, 16 * MiB);
    t->bios_rom_size = (rom_size / 65535) - 1;

+	if (CONFIG_ROM_SIZE >= 1 * GiB) {
+		t->extended_bios_rom_size =
+			DIV_ROUND_UP(CONFIG_ROM_SIZE, GiB) | (1 << 14);
+	} else {
+		t->extended_bios_rom_size = DIV_ROUND_UP(CONFIG_ROM_SIZE, MiB);
+	}
+
    t->system_bios_major_release = 4;
    t->bios_characteristics =
    	BIOS_CHARACTERISTICS_PCI_SUPPORTED |
diff --git a/src/include/smbios.h b/src/include/smbios.h
index 34a3e5b..38ebcdc 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -250,6 +250,7 @@
    u8 system_bios_minor_release;
    u8 ec_major_release;
    u8 ec_minor_release;
+	u16 extended_bios_rom_size;
    u8 eos[2];
 } __packed;