2 Mar
2022
2 Mar
'22
2:50 p.m.
Marina Michelle has created a revert of this change. ( https://review.coreboot.org/c/coreboot/+/61407 )
Change subject: soc/intel/common/cse: skip heci_init() if HECI1 is disabled ......................................................................
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0babe417173d10e37327538dc9e7aae980225367
Gerrit-Change-Number: 61407
Gerrit-PatchSet: 3
Gerrit-Owner: Matt DeVillier matt.devillier@gmail.com
Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Subrata Banik subratabanik@google.com
Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org
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Gerrit-CC: Paul Menzel paulepanter@mailbox.org
Gerrit-MessageType: revert