Attention is currently required from: Alexander Couzens, Angel Pons, Felix Singer, Jan Philipp Groß, Paul Menzel.
Nicholas Chin has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/74187?usp=email )
Change subject: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151)
......................................................................
Patch Set 7:
(3 comments)
File src/mainboard/lenovo/m900/acpi/dptf.asl:
PS4:
Yes, along with other DPTF stuff. […]
Done
File src/mainboard/lenovo/m900/cmos.layout:
https://review.coreboot.org/c/coreboot/+/74187/comment/7d52f7ea_97d5b488?usp... :
PS4, Line 28: ChromeOS
Okay, then I'd at least update the comment to say vboot instead of ChromeOS
Done
File src/mainboard/lenovo/m900/ramstage.c:
https://review.coreboot.org/c/coreboot/+/74187/comment/79001506_e70b1316?usp... :
PS4, Line 12: params->CdClock = 3;
I'm aware of what CdClock is for, I wanted to know why the code was setting the FSP UPD to 3, I gues […]
Yeah, just copypasta.
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