Andrey Petrov has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40553 )
Change subject: mb/intel/cedarisland_crb: Add dummy mainboard_memory_init_params() ......................................................................
mb/intel/cedarisland_crb: Add dummy mainboard_memory_init_params()
Add a dummy implementation (currently FSP defaults are meant for CRB). It is needed only to prevent build breakage.
Change-Id: I67b1a693886a29bdaf23f1f3f249da52ba65451a Signed-off-by: Andrey Petrov anpetrov@fb.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/40553 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/intel/cedarisland_crb/Makefile.inc A src/mainboard/intel/cedarisland_crb/romstage.c 2 files changed, 9 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Maxim Polyakov: Looks good to me, approved
diff --git a/src/mainboard/intel/cedarisland_crb/Makefile.inc b/src/mainboard/intel/cedarisland_crb/Makefile.inc index 8501868..9bd0173 100644 --- a/src/mainboard/intel/cedarisland_crb/Makefile.inc +++ b/src/mainboard/intel/cedarisland_crb/Makefile.inc @@ -1 +1,2 @@ bootblock-y += bootblock.c +romstage-y += romstage.c diff --git a/src/mainboard/intel/cedarisland_crb/romstage.c b/src/mainboard/intel/cedarisland_crb/romstage.c new file mode 100644 index 0000000..94af1b6 --- /dev/null +++ b/src/mainboard/intel/cedarisland_crb/romstage.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +#include <soc/romstage.h> + +void mainboard_memory_init_params(FSPM_UPD *mupd) +{ +}