Hello Aaron Durbin, Duncan Laurie, build bot (Jenkins), Furquan Shaikh, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33130
to look at the new patch set (#5).
Change subject: mb/google/sarien/variants/arcada: Set PCH Thermal Trip point to 77 degree C ......................................................................
mb/google/sarien/variants/arcada: Set PCH Thermal Trip point to 77 degree C
PMC logic shuts down the PCH thermal sensor when CPU is in a C-state and DTS Temp <= Low Temp Threshold (LTT) in case of Dynamic Thermal shutdown when S0ix is enabled.
BUG=None BRANCH=None TEST=Verified Thermal Device(B0: D18: F0) TSPM offset 0x1c [LTT (8:0)] value is 0xFE on Arcada.
Change-Id: I1915b974b10638b0f6ab97c6fb9b7a58d2cabc59 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/33130/5