[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATUON_3

[Brandon Breitenstein (Code Review)]

Brandon Breitenstein has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39459 )

Change subject: soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATUON_3
......................................................................

soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATUON_3

FSP UPD TcssAuxOri is used for setting the IOM_TYPEC_SW_CONFIGURATUON_3
Configure TcssAuxOri to retimer enabled on the port 2 Type-C port.
This setting informs the SoC that a retimer is taking care of SBU
orientation therefore it does not need to do any flipping.

Reference section 3.6.5 in TGL EDS #575681
BUG=b:145943811
BRANCH=none
TEST=Boot to OS and check TypeC port1 Display,
Connecting type-c display should work regardless of type-c cable
orientation.

Change-Id: Iae356113cbdc72983f800060b1ebebe3c66b9daf
Signed-off-by: Brandon Breitenstein 
---
M src/soc/intel/tigerlake/fsp_params_tgl.c
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/39459/1

diff --git a/src/soc/intel/tigerlake/fsp_params_tgl.c b/src/soc/intel/tigerlake/fsp_params_tgl.c
index 14997c5..dced634 100644
--- a/src/soc/intel/tigerlake/fsp_params_tgl.c
+++ b/src/soc/intel/tigerlake/fsp_params_tgl.c
@@ -86,6 +86,7 @@
    else
    	params->PeiGraphicsPeimInit = 0;

+	params->TcssAuxOri = 0;
    for (i = 0; i < 8; i++)
    	params->IomTypeCPortPadCfg[i] = 0x09000000;