HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37743 )
Change subject: [try] mb/amd/thatcher: switch away from ROMCC_BOOTBLOCK ......................................................................
[try] mb/amd/thatcher: switch away from ROMCC_BOOTBLOCK
Untested.
Change-Id: I0c5148fa014ac960c6b6950394a76aac6f45819c Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/amd/thatcher/Kconfig M src/mainboard/amd/thatcher/Makefile.inc A src/mainboard/amd/thatcher/bootblock.c M src/mainboard/amd/thatcher/romstage.c 4 files changed, 44 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/37743/1
diff --git a/src/mainboard/amd/thatcher/Kconfig b/src/mainboard/amd/thatcher/Kconfig index 2c0939c..e1c5aee 100644 --- a/src/mainboard/amd/thatcher/Kconfig +++ b/src/mainboard/amd/thatcher/Kconfig @@ -17,7 +17,6 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - select ROMCC_BOOTBLOCK select CPU_AMD_AGESA_FAMILY15_TN select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN select SOUTHBRIDGE_AMD_AGESA_HUDSON diff --git a/src/mainboard/amd/thatcher/Makefile.inc b/src/mainboard/amd/thatcher/Makefile.inc index f8895fa..4dde2cf 100644 --- a/src/mainboard/amd/thatcher/Makefile.inc +++ b/src/mainboard/amd/thatcher/Makefile.inc @@ -13,6 +13,8 @@ # GNU General Public License for more details. #
+bootblock-y += bootblock.c + romstage-y += buildOpts.c romstage-y += BiosCallOuts.c romstage-y += OemCustomize.c diff --git a/src/mainboard/amd/thatcher/bootblock.c b/src/mainboard/amd/thatcher/bootblock.c new file mode 100644 index 0000000..d4f7c8f --- /dev/null +++ b/src/mainboard/amd/thatcher/bootblock.c @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <stdint.h> +#include <device/pci_ops.h> +#include <superio/smsc/lpc47n217/lpc47n217.h> + +#define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1) + +void bootblock_mainboard_early_init(void) +{ + u8 byte; + pci_devfn_t dev; + + /* Set LPC decode enables. */ + dev = PCI_DEV(0, 0x14, 3); + + byte = pci_read_config8(dev, 0x48); + byte |= 3; /* 2e, 2f */ + pci_write_config8(dev, 0x48, byte); + + /* For serial port. */ + pci_write_config32(dev, 0x44, 0xff03ffd5); + byte = pci_read_config8(dev, 0x48); + byte |= 3; /* 2e, 2f */ + pci_write_config8(dev, 0x48, byte); + + lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 5678021..1c64281 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -14,37 +14,13 @@ */
#include <stdint.h> -#include <device/pci_def.h> #include <arch/io.h> -#include <console/console.h> -#include <device/pci_ops.h> #include <northbridge/amd/agesa/state_machine.h> -#include <southbridge/amd/agesa/hudson/hudson.h> -#include <superio/smsc/lpc47n217/lpc47n217.h> - -#define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1)
void board_BeforeAgesa(struct sysinfo *cb) { - u8 byte; - pci_devfn_t dev; - - /* Set LPC decode enables. */ - dev = PCI_DEV(0, 0x14, 3); - - byte = pci_read_config8(dev, 0x48); - byte |= 3; /* 2e, 2f */ - pci_write_config8(dev, 0x48, byte); - post_code(0x30); - /* For serial port. */ - pci_write_config32(dev, 0x44, 0xff03ffd5); - byte = pci_read_config8(dev, 0x48); - byte |= 3; /* 2e, 2f */ - pci_write_config8(dev, 0x48, byte); - post_code(0x31); - lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
outb(0x24, 0xcd6); outb(0x1, 0xcd7);