[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/apollolake: Fix value stored to gnvs is never read

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32903 )

Change subject: soc/intel/apollolake: Fix value stored to gnvs is never read
......................................................................

soc/intel/apollolake: Fix value stored to gnvs is never read

Clang Static Analyzer found version 8.0.0 gnvs is allocated, but
it is never used. Change sizeof(*gnvs) to sizeof(global_nvs_t)
while adding ACPI GNVS to CBMEM.

TEST=Built and boot up to kernel.

Change-Id: Ie9421af4a556d1d88183aa938ee2a124a10ab727
Signed-off-by: John Zhao 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32903
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/soc/intel/apollolake/chip.c
1 file changed, 1 insertion(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index f6880a7..e9030dc 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -389,8 +389,6 @@

static void soc_init(void *data)
 {
-	struct global_nvs_t *gnvs;
-
    /* Snapshot the current GPIO IRQ polarities. FSP is setting a
     * default policy that doesn't honor boards' requirements. */
    itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
@@ -418,7 +416,7 @@
    p2sb_unhide();

/* Allocate ACPI NVS in CBMEM */
-	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
+	cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs_t));

/* Set RAPL MSR for Package power limits*/
    set_power_limits();