[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Add FSP support for including AGESA

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34423 )

Change subject: soc/amd/picasso: Add FSP support for including AGESA
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Patch Set 27:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34423/27/src/soc/amd/picasso/romsta... 
File src/soc/amd/picasso/romstage.c:

https://review.coreboot.org/c/coreboot/+/34423/27/src/soc/amd/picasso/romsta... 
PS27, Line 34: 	/* Disable WB from to region 4GB - TOM2 */
> AGESA has always set MTRRs and the default caching. […]

We need ensure to AGESA/FSP doesn't manipulate things it shouldn't. MTRR and cacheablility resources are definitely something it should not be doing. We have a bug to fix that. And once that is done we can nuke all this code as coreboot decides the policy w/o having to fix up things after AGESA runs.