[coreboot-gerrit] Change in coreboot[master]: mb/google/octopus/variants/fleex: Update GPIOs to fix EMR

[Marco Chen (Code Review)]

Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35881 )

Change subject: mb/google/octopus/variants/fleex: Update GPIOs to fix EMR
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35881/1/src/mainboard/google/octopu... 
File src/mainboard/google/octopus/variants/fleex/gpio.c:

https://review.coreboot.org/c/coreboot/+/35881/1/src/mainboard/google/octopu... 
PS1, Line 32: 	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_140, 0, DEEP, NONE, Tx1RxDCRx0, DISPUPD),
> I checked some project, it's not consist with all. Some set the same, some set the opposite.

If so, I would suggest to follow Octopus - yorp baseboard design because there are a lot of projects validated original design and setting already except you have good reason to support your decision. The original reason - inverter is not valid because all projects derived from yorp all have inverter as well.

On the other hand, if you refer to acpi_device_add_power_res() of coreboot then you will notice that in _ON, there is no delay between enable reset pin and disable reset pin. As a result, if your coreboot setting set reset pin as disabled then I doubt the enable state of reset pin is very short and might not apply the spec? Instead if set initial reset pin as enabled in coreboot then there is a native timing to keep it as enabled from booting coreboot to kernel then the enabled timing will be long enough.