[coreboot-gerrit] Change in coreboot[master]: vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt soc

[Maxim Polyakov (Code Review)]

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44257 )

Change subject: vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt soc
......................................................................

Patch Set 6: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/44257/6/src/vendorcode/intel/fsp/fs... 
File src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FspmUpd.h:

https://review.coreboot.org/c/coreboot/+/44257/6/src/vendorcode/intel/fsp/fs... 
PS6, Line 329: /** Offset 0x008D - MBA BW Calibration
             :   MBA BW Calibration setting
             :   0:Linear, 1:Biased, 2:Legacy, 3:Auto
             : **/
             :   UINT8                       MbeBwCal;
What's the default value for this option?
I mean, if I'm not programming this in coreboot, what value will fsp set for this option?
Auto?

Previously, the default value was marked in * .h files with UPD:

3rdparty/fsp/ApolloLakeFspBinPkg/Include/FspmUpd.h : 89
0x02:MMIO(Default).

Can you make appropriate notes here to avoid future confusion?
And for other UPD options too...