Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42194 )
Change subject: soc/mediatek/mt8183: Adjust tRFCab and tRFCpb by the density value
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Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42194/2//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/42194/2//COMMIT_MSG@10
PS2, Line 10:
this purpose of patch is to support 6GB,8GB DDR.
Yup, this is for new features.
https://review.coreboot.org/c/coreboot/+/42194/4//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/42194/4//COMMIT_MSG@9
PS4, Line 9: timing.
Line too long. Put "timing" in the next line.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2599fcd620cdefe2e12480932ffd75e0416b9545
Gerrit-Change-Number: 42194
Gerrit-PatchSet: 4
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Gerrit-Reviewer: Yu-Ping Wu
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