[coreboot-gerrit] [L] Change in coreboot[main]: soc/intel/pantherlake: Add FSP-S programming

[Jérémy Compostella (Code Review)]

Attention is currently required from: Kapil Porwal, Paul Menzel, Pranava Y N, Ronak Kanabar, Subrata Banik.

Hello Kapil Porwal, Paul Menzel, Pranava Y N, Ronak Kanabar, Subrata Banik, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/84552?usp=email

to look at the new patch set (#13).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: soc/intel/pantherlake: Add FSP-S programming
......................................................................

soc/intel/pantherlake: Add FSP-S programming

FSP-S UPDs are programmed according to the configuration (Kconfig and
device tree) in ramstage.

BUG=348678529
TEST=Hardware is programmed as desired and Intel Panther Lake
     reference board boots to UI.

Change-Id: Iea26d962748116fa84afdb4afcba1098a64b6989
Signed-off-by: Jeremy Compostella 
---
M src/soc/intel/pantherlake/fsp_params.c
1 file changed, 735 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/84552/13