Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32652 )
Change subject: soc/amd/stoneyridge: Rework SPI base address get/set
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Patch Set 4:
(1 comment)
https://review.coreboot.org/#/c/32652/4/src/soc/amd/stoneyridge/include/soc/...
File src/soc/amd/stoneyridge/include/soc/southbridge.h:
https://review.coreboot.org/#/c/32652/4/src/soc/amd/stoneyridge/include/soc/...
PS4, Line 360: 32
Shouldn't this be 64 to ensure bit 5 is also preserved?
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