[coreboot-gerrit] Change in coreboot[master]: soc/intel/{apl,cnl,icl,skl,tgl}: Update SA bit fields as per EDS

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38387 )

Change subject: soc/intel/{apl,cnl,icl,skl,tgl}: Update SA bit fields as per EDS
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Patch Set 3:
> Patch Set 3:
> > Patch Set 2:
> >
> > (3 comments)
>
> Alright, but the "true" showed up looks not that easily to understand without checking the definition first. Using enum to have _64 and _32 to replace the "true" and "false"?

Sure, let me take a look on this
> I was talking about upper registers with +4, if 32 bit, upper 32bit of base will be zero anyway. However that's a bad idea, I can't grantee a redundant write will cause anything.

Agree with you