Tristan Corrick has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30455
Change subject: Doc/nb/intel/haswell: Add a list of known issues ......................................................................
Doc/nb/intel/haswell: Add a list of known issues
Change-Id: If0339831550f6c70e8056f78633e9a402f35a793 Signed-off-by: Tristan Corrick tristan@corrick.kiwi --- M Documentation/mainboard/asrock/h81m-hds.md M Documentation/northbridge/intel/haswell/index.md A Documentation/northbridge/intel/haswell/known-issues.md 3 files changed, 36 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/30455/1
diff --git a/Documentation/mainboard/asrock/h81m-hds.md b/Documentation/mainboard/asrock/h81m-hds.md index 460af8f..5e80f2b 100644 --- a/Documentation/mainboard/asrock/h81m-hds.md +++ b/Documentation/mainboard/asrock/h81m-hds.md @@ -78,6 +78,10 @@ in coreboot. The `coretemp` driver can still be used for accurate CPU temperature readings from an OS.
+```eval_rst +Please also see :doc:`../../northbridge/intel/haswell/known-issues`. +``` + ## Untested
- parallel port diff --git a/Documentation/northbridge/intel/haswell/index.md b/Documentation/northbridge/intel/haswell/index.md index 3eb8059..87fb56f 100644 --- a/Documentation/northbridge/intel/haswell/index.md +++ b/Documentation/northbridge/intel/haswell/index.md @@ -6,3 +6,7 @@ ## Proprietary blobs
- [mrc.bin](mrc.bin.md) + +## Issues + +- [Known issues](known-issues.md) diff --git a/Documentation/northbridge/intel/haswell/known-issues.md b/Documentation/northbridge/intel/haswell/known-issues.md new file mode 100644 index 0000000..d257265 --- /dev/null +++ b/Documentation/northbridge/intel/haswell/known-issues.md @@ -0,0 +1,28 @@ +# Known issues with Haswell + +These issues are specific to the Haswell architecture. For a given +mainboard, there might be additional issues to those listed here. + +## PCIe graphics + +```eval_rst +Using a PCIe graphics card for display output is not currently +supported. This is because :doc:`./mrc.bin` requires workarounds to +have such a feature working correctly. +``` + +However, there is a [patch on Gerrit][hsw-gfx-gerrit] that allows PCIe +graphics to be used for display output. This patch is not guaranteed to +be of the same level of quality as code committed to coreboot. + +Still, in some cases, a PCIe graphics card can be used for rendering, +while the integrated graphics device is used for display output. This +can be achieved under GNU/Linux by using [PRIME GPU offloading][PRIME]. + +## PCIe 3.0 + +Only PCIe 2.0 has been tested so far. PCIe 3.0 could potentially have +stability issues. + +[PRIME]: https://wiki.archlinux.org/index.php/PRIME +[hsw-gfx-gerrit]: https://review.coreboot.org/q/topic:%22haswell-graphics%22+(status:open%20OR...)