[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Support to initialize Memory

[EricR Lai (Code Review)]

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39847 )

Change subject: soc/intel/tigerlake: Support to initialize Memory
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Patch Set 3:
> Patch Set 3:
> > Patch Set 3:
> > > Patch Set 3:
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> > > Then we can combine the entry point in meminit_tgl. Currently only volteer is use TGL, right?
> >
> > I think we should have entry points based on memory type. There are some differences in what each memory type supports or how it can be configured. Those entry points can do the work specific for that memory type and then call a common routine to do the stuff which is not different across different memories e.g. SPD setting.
>
> But we have one baseboard for two different type. Deltan is SODIMM and Deltaur is solderdown. In this case we need use two different entry in romstage by type.

Oh won't be a problem, we use weak function for the entry. I am okay with this.