Hello Kyösti Mälkki, HAOUAS Elyes, Denis Carikli,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/37710
to review the following change.
Change subject: Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID" ......................................................................
Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID"
This reverts commit 01787608670adec26fcea48173e18395e51c790e.
AMD: Dropping the _HID of PCI root bus doesn't work well and people started to notice the breakage.
Intel: These platforms have a devicetree switch to choose between PCI and ACPI modes. In the former case we need _ADR, but in the latter _HID as the PCI devices is hidden.
Change-Id: If7b52b9e8f2f53574849aa3fddfccfa016288179 Signed-off-by: Nico Huber nico.huber@secunet.com --- M src/northbridge/amd/agesa/family14/acpi/northbridge.asl M src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl M src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl M src/northbridge/amd/pi/00630F01/acpi/northbridge.asl M src/northbridge/amd/pi/00660F01/acpi/northbridge.asl M src/northbridge/amd/pi/00730F01/acpi/northbridge.asl M src/soc/amd/stoneyridge/acpi/northbridge.asl M src/soc/intel/broadwell/acpi/serialio.asl M src/southbridge/intel/lynxpoint/acpi/serialio.asl 9 files changed, 25 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/37710/1
diff --git a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl index fad157d..06199a1 100644 --- a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ +Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
@@ -125,6 +125,7 @@
/* Northbridge function 3 */ Device(NBF3) { + Name(_ADR, 0x00180003)
/* k10temp thermal zone */ #include "thermal_mixin.asl" diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl index 96c2d8b..9a1fa9e 100644 --- a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -/* Name(_HID, EISAID("PNP0A03")) // PCI Express Root Bridge */ +Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */ diff --git a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl index a7e8307..f74b31a 100644 --- a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl +++ b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ +Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
diff --git a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl index de47bc2..c2b3aac 100644 --- a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -/* Name(_HID, EISAID("PNP0A03")) // PCI Express Root Bridge */ +Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */ diff --git a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl index 4a48aaf..d54f985 100644 --- a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl @@ -16,7 +16,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ +Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
diff --git a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl index b317ccf..f74b31a 100644 --- a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl @@ -16,9 +16,10 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ +Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ + /* Describe the Northbridge devices */
Method(_BBN, 0, NotSerialized) /* Bus number = 0 */ diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl index 09bf2e1..fe78534 100644 --- a/src/soc/amd/stoneyridge/acpi/northbridge.asl +++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl @@ -17,7 +17,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ +Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
diff --git a/src/soc/intel/broadwell/acpi/serialio.asl b/src/soc/intel/broadwell/acpi/serialio.asl index fd25b0d..1b44e95 100644 --- a/src/soc/intel/broadwell/acpi/serialio.asl +++ b/src/soc/intel/broadwell/acpi/serialio.asl @@ -157,7 +157,7 @@ Device (SDMA) { // Serial IO DMA Controller - /* Name (_HID, "INTL9C60") */ + Name (_HID, "INTL9C60") Name (_UID, 1) Name (_ADR, 0x00150000)
@@ -205,6 +205,7 @@ Return ("INT33C2") } Name (_UID, 1) + Name (_ADR, 0x00150001)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -275,6 +276,7 @@ Return ("INT33C3") } Name (_UID, 1) + Name (_ADR, 0x00150002)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -345,6 +347,7 @@ Return ("INT33C0") } Name (_UID, 1) + Name (_ADR, 0x00150003)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -400,6 +403,7 @@ Return ("INT33C1") } Name (_UID, 1) + Name (_ADR, 0x00150004)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -467,6 +471,7 @@ Return ("INT33C4") } Name (_UID, 1) + Name (_ADR, 0x00150005)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -534,6 +539,7 @@ Return ("INT33C5") } Name (_UID, 1) + Name (_ADR, 0x00150006)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -590,6 +596,7 @@ } Name (_CID, "PNP0D40") Name (_UID, 1) + Name (_ADR, 0x00170000)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl index 0eebe32..9323b91 100644 --- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl +++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl @@ -123,7 +123,7 @@ Device (SDMA) { // Serial IO DMA Controller - /* Name (_HID, "INTL9C60") */ + Name (_HID, "INTL9C60") Name (_UID, 1) Name (_ADR, 0x00150000)
@@ -163,6 +163,7 @@ Name (_HID, "INT33C2") Name (_CID, "INT33C2") Name (_UID, 1) + Name (_ADR, 0x00150001)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -244,6 +245,7 @@ Name (_HID, "INT33C3") Name (_CID, "INT33C3") Name (_UID, 1) + Name (_ADR, 0x00150002)
Name (SSCN, Package () { 432, 507, 30 }) Name (FMCN, Package () { 72, 160, 30 }) @@ -325,6 +327,7 @@ Name (_HID, "INT33C0") Name (_CID, "INT33C0") Name (_UID, 1) + Name (_ADR, 0x00150003)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -362,6 +365,7 @@ Name (_HID, "INT33C1") Name (_CID, "INT33C1") Name (_UID, 1) + Name (_ADR, 0x00150004)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -412,6 +416,7 @@ Name (_HID, "INT33C4") Name (_CID, "INT33C4") Name (_UID, 1) + Name (_ADR, 0x00150005)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -462,6 +467,7 @@ Name (_HID, "INT33C5") Name (_CID, "INT33C5") Name (_UID, 1) + Name (_ADR, 0x00150006)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate () @@ -499,6 +505,7 @@ Name (_HID, "INT33C6") Name (_CID, "PNP0D40") Name (_UID, 1) + Name (_ADR, 0x00170000)
// BAR0 is assigned during PCI enumeration and saved into NVS Name (RBUF, ResourceTemplate ()